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天津飛思卡爾強(qiáng)芯集成電路有限公司實(shí)習(xí)信息
發(fā)布于:2013-03-08 10:33:30   |   來源:研究生院   |   作者:admin   |   瀏覽次數(shù):6806
  Position: 

  Analog Layout Engineer

  Location: Tianjin

 

Job Description:

Perform full-custom layout, LVS/DRC physical verification and parasitic extraction for Freescale analog blocks and IO libraries.

Be responsible for generating all the physical views for chip level integration.

Communicate and get directions from the analog design engineers to ensure high quality.

 

Job Requirements:

Graduate students in Electrical Engineering Department

Be familiar with layout-related EDA tools, such as Virtuoso/Virtuoso   XL from Cadence and Calibre DRC/LVS from Mentor Graphic

Knowledge on CMOS fabrication process and device structure is a plus

Knowledge on analog circuit design is a plus

Knowledge on ESD protection circuit is a plus

Understanding the importance of communication with analog designers

Good English skills (verbal and written)

Be interested in custom layout work and self-motivated


Contact Information:

Please understand that we will not reply your mail unless you are selected to enter the interview section, because there are so many resumes to be reviewed.

 

Please send your resume to mailbox:

Sunny Zhang ([email protected]);

Taiya Ding ([email protected]);

Antony Zhang([email protected]).

 

Thanks & Best Regards,

Isabella

 

Position:      
EMC R&D Engineering Intern. 
      
Job Description:    
-- Perform EMC related tests, including IC level EFT, ESD, CE/RE and CI/RI test; as well as board level EMC test. Be responsible for edit and/or review EMC report.

-- Design EMC test board, validation board, and necessary daughter cards. Responsibilities will include the PCB schematic design, creation of component symbols and footprints, mechanical evaluation, component placement, signal routing, library maintenance and documentation.

-- Develop EMC test code, including code editing, compiling and debugging to meeting different EMC test request.

-- R&D on EMC/ESD modeling and on how to improve EMC/ESD performance on IC and PCB level to meet IEC EMC performance and to meet specify request from customer. To work with IC designers to create high EMC performance chips.
      
Job Requirements:    
1. Achieving EE master degree or above.    
2. Strong background knowledge on EMC and microwave.  Understand EMC improvement techniques on both IC level and board level.    
3. Familiar with IEC EMC Standards.    
4. Experienced on lab job, including the operation of normal lab equipments.    
5. Experience on PCB design is a big plus.    
6. Knowledge on IC modeling is a big plus.    
7. Knowledge on IC design is a big plus.    
8. Knowledge on software coding is a plus.    
9. Good at English, especially listening and writing.    
10. Good communication skills    
11. Team player    

Working Time:

-- Four days per week.

      
Send Resume To:       
Billy Wang ([email protected]

Thanks & Best Regards,

Isabella